December 1, 2009 -- Without a great deal of fanfare, electronic system- level (ESL) design tools have made their way into mainstream design methodologies. Consider high-level synthesis (HLS), or the notion of synthesizing a design into register transfer level (RTL) from a higher level of abstraction.
Launched in 2004, Mentor Graphics’ Catapult C has seen continual improvement. Mentor has now fully endowed Catapult C with the ability to synthesize control-logic blocks, enabling it to synthesize full chips from ANSI C++ to RTL. It’s also one of the best EDA releases of 2009.
David Maliniak, Electronic Design Technical Editor
This brief introduction has been excerpted from the original copyrighted article.