November 17, 2010 -- Increasing numbers of integrated circuits (ICs) are targeted at mobile/ wireless applications. The amount of analog content in these designs increases as designers integrate more functions such as WiFi, Bluetooth, 3G, GPS, and audio. The difficulty of verifying these designs is compounded by the fact that the chip designer may be including analog IP from outside sources. The chip designer might not have any analog background. This situation requires fast, robust, automatic verification of analog design rules. Traditional methods of verification are inefficient and error-prone.

By Greg Hackney, Fedor Pikus, Steven Chen and M.J. Huang. (Hackney manages the PERC, LFD, and LVS engineering groups at Mentor Graphics; Pikus works for the Design to Silicon division of Mentor Graphics as a chief software architect for the Calibre LVS, DFM, PERC, and LFD products; Chen is deputy director for the Design Automation Department at TSMC; Huang works in the Design Automation Department of TSMC managing AMS design methodology and automation.)