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Using SystemC to Build a System-on-Chip Platform  
Publication: EE Times Embedded
Contributor: Texas Instruments, Inc. (TI)
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February 2, 2011 -- As an embedded systems designer, you may find you're working more with hardware design languages and the system-on-chip (SOC). Perhaps you're building boards or systems using components, both of which often now deal with SOCs either in ASIC or FPGA form. How SOCs are modeled and simulated may feel like a prequel to your design, but it's valuable story.

This article discusses the role of performance modeling in creating both the OMAP-2 platform and the devices based on it. The OMAP-2 is a platform from Texas Instruments for creating SOCs. The platform is underpinned by a basic set of rules and guidelines covering programming models, bus interfaces, and RTL (register transfer level) design.

The platform is highly generic. It's capable of supporting a wide range of functional and performance requirements, some of which may be unknown when the platform is created.

By James Aldis. (Aldis is co-chair for OCP-IP system-level design working group as well as a senior member of Group Technical Staff at Texas Instruments, Inc.)

This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the EE Times Embedded website.

Read more about
Texas Instruments, Inc. (TI)
on SOCcentral.com

Keywords: ASICs, ASIC design, embedded systems, embedded system design, EDA, EDA tools, electronic design automation, SystemC, system-on-chip, SoC, EE Times Embedded, Texas Instruments,
599/33108 2/2/2011 1299 183


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