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International Workshop on System-Level Interconnect Prediction (SLIP 2011)   Featured
Sponsor: IEEE
Location: San Diego,CA  USA
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The System Level Interconnect Prediction (SLIP) Workshop, June 5, 2011, is co-located with the 48th Design Automation Conference. The general technical scope of the workshop is the design, analysis and prediction of intercommunication fabrics in electronic systems. Representative technical topics include:
  • Interconnect prediction and optimization at various IC design stages.
  • Interconnect design challenges and system-level NoC design.
  • Design and analysis of power and clock networks.
  • Interconnect architecture of structural designs and FPGAs.
  • Interconnect fabrics of many-core architectures.
  • Design-for-manufacturing (DFM) techniques for interconnects.
  • igh speed chip-to-chip interconnect design.
  • Design and analysis of chip-package interfaces.
  • Interconnect topologies of multiprocessor systems.
  • 3D interconnect design and prediction, including through-silicon via (TSV) architecture and monolithic 3D stacking.
  • Emerging interconnect technologies, e.g., RF interconnects, photonic networks, carbon-based interconnects, etc.
  • Synergies between chip inter-communication networks and networks arising in other contexts such as social networks, system biology, etc.


Go directly to sponsor site for complete conference details.

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351/33325 6/5/2011 774 245
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