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Comparing Hot Swap IC Solutions in Server Power Reporting-Part 1  
Publication: EE Times Power Management Designline
Contributor: National Semiconductor Corp.
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June 10, 2011 -- High-performance servers have long used a power-measurement method that is based on analog-current sensing, filtering, and calibration circuits providing signals to an ADC contained in the Baseboard Management Controller (BMC). This system typically uses a calibration circuit to provide state of the art accuracy, although the shunt resistor itself is not included within the calibration loop. The component count and board real-estate requirements of this circuit are high.

Power density is not the only issue in today's data center; operating cost has been another hot topic as the number of servers rose in the past years. Many techniques such as power capping have been introduced to increase energy efficiency in data center, but the ability to measure the power level accurately remain the key factor. This article compares the area, cost, power saving, and other benefits gained with an integrated solution used in protection and power measurement in servers compared to discrete implementations.

By Joy Taylor and Jerry Steele. (Taylor is a product marketing manager at National Semiconductor Corp. and Steele is a strategic applications engineer at National Semiconductor's Tucson Design Center.)

This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the EE Times Power Management Designline website.

Read more about
National Semiconductor Corp.
on SOCcentral.com

Keywords: embedded system design, embedded systems, power management, power analysis, power optimization, EE Times Power Management Designline, National Semiconductor, Joy Taylor, Jerry Steele,
599/34120 6/10/2011 663 108


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