| Toshiba Selects MunEDA WiCkeD Tool Suite to Enhance Circuit Analysis, Performance and Yield Optimization | | |
June 23, 2011 -- MunEDA GmbH today announced that Toshiba Corp. selected the MunEDA WiCkeD tool suite for an integral part of its custom IC design flow. WiCkeD is a circuit analysis and sizing environment, and includes tools for schematic porting, nominal circuit analysis and optimization, variation-aware design analysis, parametric yield optimization, and circuit model generation.
"After intensive evaluations, we selected the WiCkeD tool suite to enhance our productivity for analog-mixed-signal design products," said Yukihiro Urakawa, Senior Manager, Logic LSI Design Department, Logic LSI Division of Semiconductor Company, Toshiba. "Using WiCkeD on different projects, we achieved speed-ups in our circuit analysis, porting and sizing process, reducing the sizing time and effort to deliver quality products for 40 nanometer and below in time."
Go to the MunEDA GmbH website to find additional information.
| Read more about
MunEDA GmbH
on SOCcentral.com |
| Keywords: ASICs, ASIC design, custom IC design, EDA, EDA tools, electronic design automation, circuit simulation, design for manufacturing, design-for-manufacturing, DFM, design for yield, design-for-yield, DFY, MunEDA,
| | 600/34135 6/23/2011 508 85 | |
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| | 0.390625 |
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