June 28, 2011 -- Today's system-on-chip (SOC) designs incorporate various input-output capabilities and are multi-core systems with fast communication protocols. SOCs often incorporate various processing elements for multimedia and networking applications. The convergence of computing, communications, and multimedia data processing onto one chip pushes SOC complexity in two areas: SOC integration and software development.
To address SOC integration issues, the industry has been moving toward standardizing the IP core interfaces to achieve high reuse. The Open Core Protocol-International Partnership (OCP-IP) is a standards forum focusing on SOC integration concerns. OCP-IP defines a high-performance, SOC bus-independent interface between IP cores. This makes the IP core independent of the architecture and design of systems in which they are used.
SOC developers not only need to achieve high performance, but the product also must be flexible and programmable. As a result, SoCs are becoming software intensive. Software content on these SOCs comprises low-level firmware, device drivers, telecom/ communication stacks, operating system (OS) code, and application software, etc. Development and validation of so much software is a big challenge.
To address these software development challenges, the industry has been adopting more abstract simulation models, which can deliver enough performance and accuracy to enable software development to begin in parallel with chip development. The Open SystemC Initiative (OSCI) is a standards forum focusing on defining the standards for creating software models of SOC. SystemC is a standard language for modeling of SOC. OSCI TLM2.0 is a standard library for transaction-level modeling. OCP-IP has created an advanced modeling kit by extending OSCI TLM2.0 for the Open core protocol.
The OSCI and OCP-IP standards have the potential to address most of the challenges in current SOC designs. We at CircuitSutra have demonstrated the virtual platform by using the modeling standards from OCP-IP and OSCI.
Using the virtual platform for embedded software development instead of using an FPGA board provides several advantages. It allows hardware design and embedded software development to proceed in parallel, hence reducing the time to market for electronics product. It also provides more powerful debug features needed to develop and verify complex software for a multicore SOC.
This article discusses how to create an SOC virtual platform for embedded software development.
By Umesh Sisodia, Girish Verma, Ashwani Singh, Dheeraj Kaushik. (Sisodia is CEO at CircuitSutra Technologies; Verma serves CircuitSutra Technologies as a technical leader in the SOC modeling domain; Singh is a technical leader in the SOC modeling domain; and Kaushik works with CircuitSutra Technologies as a consultant in the SOC modeling domain.)
This brief introduction has been excerpted from the original copyrighted article.
View the entire article on the Electronic Design Magazine website.