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Use an SOC for Cost-Effective 3D  
Publication: EE Times Communications Designline
Contributor: Cypress Semiconductor Corp.
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August 4, 2011 -- As consumer adoption rates for 3D display technologies increase, manufacturers of 3D active shutter glasses face the continual challenge of developing high quality glasses at costs consumers are willing to accept. Reducing the physical size, developing true universal operation, and lowering power consumption have also become critical considerations for manufacturers vying for a piece of this market.

This article will examine the current 3D active shutter architectures employed today and contrast those with the next generation solutions now available.

By Tyson Lunsford,and Robert Murphy. (Lunsford is a Business Development Manager at Cypress Semiconductor and Murphy is an Application Engineer at Cypress Semiconductor.)

This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the EE Times Communications Designline website.

Read more about
Cypress Semiconductor Corp.
on SOCcentral.com

Keywords: ASICs, ASIC design, custom IC design, 3D ICs, 3D chips, stacked ICs, EE Times Communications Designline, Cypress Semiconductor,
599/34538 8/4/2011 533 77


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