January 5, 2012 -- Over the past few years, interest in prototyping electronic designs has grown. The rising size and complexity of systems and the limitations of using a single-purpose model, i.e., the hardware-design model, have fueled this growth. Engineers have traditionally modeled the hardware-design model at the RTL (register-transfer level) and then performed a number of refinement steps until that model becomes the implementation model. This single-purpose model has in the past found use only in hardware design, although engineers are now considering its use for other purposes.

The EDA industry has developed tools, such as equivalence checkers, to ensure that the functionality of this evolving model stays consistent during these transformations. In an ideal world, all modifications would apply to the single model at the start of the chain, and changes would propagate throughout the chain. In the real world, however, engineers make changes to the subsequently derived models, potentially leading to departures between the original high-level model and the final implementation. This area has always been regarded as a risk in the development cycle, and that risk increases as additional independent models are generated throughout the flow.

The single hardware-design model can no longer provide all of the functions users demand. The rapid increase in software content means that its development, debugging, and integration cannot be left until first silicon comes back from the fab. The RTL model is too slow for the effective performance of these tasks because it contains implementation details that software execution does not require. Engineers have used emulation to speed the RTL model, but this approach is still too slow, and it is often too expensive for manufacturers to make available to software-development teams. Engineers need faster and cheaper prototypes that are available much earlier in the design flow.

By Brian Bailey, EDN Magazine Contributing Technical Editor.