April 17, 2012 -- Arteris SA today announced that Core Logic has selected Arteris FlexNoC interconnect IP as the backbone SOC interconnect in its next-generation mobile and multimedia processors.

Core Logic is one of Korea's largest fabless semiconductor vendors, with expertise in low-power mobile and multimedia systems-on-chip (SOCs). As the complexity of its SOCs increased, along with back-end timing and routing-congestion issues, Core Logic found that its previous interconnect IP solution could not scale to meet its advancing needs.

"Arteris is the first company to offer NoC technology for bus architecture use, and after our technical evaluation we know it will help us handle our complex SOC routing and timing issues," said Cabin Koo, Chief Engineer at Core Logic. "We are confident that Arteris FlexNoC will help us eliminate back-end issues while simultaneously shrinking our development schedules. Arteris FlexNoC interconnect IP is a must to create advanced SOCs, and we are using it for multiple design projects."