April 18, 2012 -- Synopsys, Inc. today announced the production qualification and adoption of Synopsys' Proteus LRC at Renesas Electronics Corp. Proteus LRC provides manufacturers like Renesas with a highly accurate and comprehensive lithographic verification solution. Through the use of industry-proven lithography models and integrated rigorous simulation, Proteus LRC identifies yield-impacting hotspots prior to committing a design to manufacture.

"We require a highly accurate lithographic verification solution that has a low cost of ownership and and has ability to reduce our process-development time," said Nobuyasu Yui, Department Manager, Analog Design Technology Development Department, EDA & Design Methodology Division, Technology Development Unit at Renesas Electronics. "The adoption of Proteus LRC for our leading-edge microcontroller has improved our optical proximity correction development efficiency contributing to faster time to market."

Proteus LRC uses the same industry-proven compact models utilized during the application of Proteus optical proximity correction (OPC) for easy deployment and dependable accuracy. Further accuracy and precise validation of hotspots can be achieved through resist profile and topography simulations with the embedded Sentaurus Lithography rigorous simulator.

Proteus LRC is built on the Proteus engine and integrated into Synopsys' Proteus Pipeline Technology, enabling a single-flow solution from design tape-out to mask fracture. The Pipeline delivers concurrent processing at all stages of the mask synthesis and fracture flow to minimize I/O time for efficient handling of large terabyte datasets encountered at leading-edge technology nodes. The Proteus engine provides an industry-proven platform that is highly scalable to hundreds, even thousands, of CPUs. This enables control of turn-around time while maintaining the lowest cost of ownership through the use of standard x86 processor cores.