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Key Methods for Controlling EMC   Featured
Publication: EE Times Test & Measurement Designline
Contributor: Cypress Semiconductor Corp.
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May 7, 2012 -- Increasing clock speeds, coupled with high-frequency bus and interface data rates, make PC board design significantly more challenging. Engineers have to look beyond the design of the actual logic on the board to other factors that can affect circuits, such as board size, environmental noise, power consumption and electromagnetic compatibility (EMC). Hardware engineers should address EMC issues during the PC board design phase to ensure a system free of EMC faults.

 

By Ashish Kumar and Pushek Madaan. (Kumar is senior product engineer at Cypress Semiconductor India Pvt., Ltd. and Madaan is senior application engineer at Cypress Semiconductor India.)


This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the EE Times Test & Measurement Designline website.

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Cypress Semiconductor Corp.
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Keywords: PCB design, PCBs, printed circuit boards, EDA, EDA tools, electronic design automation, electromagnetic compatibility EMC, electromagnetic interference, EMI, Cypress Semiconductor, EE Times Test & Measurement Designline
602/38441 5/7/2012 450 70


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