May 4, 2012 -- In the past, preparing a first implementation of an FPGA design on the board was relatively straightforward, requiring only a single design project, a handful of source projects, and a single design engineer. Subsequent improvements to the FPGA design on the board could be reflected in a matter of hours. Today's designs are not so simple.
FPGAs are used in production to implement complex designs such as those for consumer, computer, and communications applications, where staying ahead of the competition requires fast delivery of the next-generation system that includes new functionality or perhaps takes advantage of a new FPGA device.
And, more and more, FPGA-based prototyping systems are being used to verify huge pending ASIC designs. These types of designs typically consist of 1000s of source files and implement the equivalent of multi-million gate ASIC designs. To add to the problem, the engineer implementing and verifying the design in an FPGA may not have been the one who authored the RTL code and may therefore be unfamiliar with it.
By Angela Sutton. (Sutton is a Product Marketing Manager for Synopsys, Inc.)
This brief introduction has been excerpted from the original copyrighted article.
View the entire article on the EE Times Programmable Logic Designline website.
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