May 29, 2012 -- MagnaChip Semiconductor Corp. has signed a joint development agreement with Yield Microelectronics Corp. (YMC) to develop a family of 0.35µm and 0.18µm standard Multiple Times Programmable (MTP)-IP (intellectual property) devices.

This MTP-IP joint development agreement covers several standard memory cell sizes well-suited for embedded applications such as displays, PMIC and LED controllers. By adding YMC's MTP-IP to MagnaChip's existing NVM (non-volatile memory) portfolio, MagnaChip can provide enhanced foundry services to its global customers that incorporate next-generation, low-current embedded NVM performance.

These devices require simple processing and minimal programmability and utilize mixed-signal and BCD/ high-voltage technologies. For these requirements, YMC's MTP-IP employing MagnaChip's advanced manufacturing processes can be the optimal and cost-effective NVM solution for analog trim, configuration settings, code storage, digital-rights management, and secure-identification management.

This joint development project is scheduled to begin immediately, with design completion by June 2012 and qualification by the end of the year.