May 3, 2012 -- As is well known, the system-on-chip (SOC) verification problem grows faster than design size, so it takes more time and effort to verify a complete SOC than an individual IP block. However, the problems with SOC verification are deeper than just the increase in size. The biggest new wrinkle introduced by today's large multicore SOC is the greater number of shared resources, sometimes called "points of convergence" by verification engineers.

Every level of the bus structure is hammered by multiple master agents vying for access. Every memory is accessed by multiple processors, processing engines, and peripherals, with complex rules to protect regions from being corrupted. The SOC usually has multiple high-performance interfaces, likely using a mix of standard and proprietary protocols. The activity on these interfaces is intimately connected with the processors. All this presents a major challenge for traditional verification.

By Thomas Anderson. (Anderson is with Breker Verification Systems.)